Issued Patents 2019
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10522391 | Method and apparatus for back end of line semiconductor device processing | Chih-Yuan Ting, Jyu-Horng Shieh | 2019-12-31 |
| 10515895 | Method of preventing pattern collapse | Chih-Yuan Ting, Jeng-Shiou Chen, Jang-Shiang Tsai, Jyu-Horng Shieh | 2019-12-24 |
| 10510588 | Interconnection structure and manufacturing method thereof | Shiu-Ko JangJian, Chien-Wen Chiu, Chien-Chung Chen | 2019-12-17 |
| 10332787 | Formation method of interconnection structure of semiconductor device | Chien-Wen Chiu, Chien-Chung Chen, Shiu-Ko JangJian | 2019-06-25 |
| 10170420 | Patterning approach for improved via landing profile | Chih-Yuan Ting | 2019-01-01 |