| 10489323 |
Data processing system for a home node to authorize a master to bypass the home node to directly send data to a slave |
Guanghui Geng, Andrew David Tune, Daniel Sara, Bruce James Mathewson, Jamshed Jalal |
2019-11-26 |
| 10489315 |
Dynamic adaptation of direct memory transfer in a data processing system with mismatched data-bus widths |
Tushar P. Ringe, Jamshed Jalal, Mark David Werkheiser, Ramamoorthy Guru Prasadh, Gurunath Ramagiri |
2019-11-26 |
| 10402349 |
Memory controller having data access hint message for specifying the given range of one or more memory addresses |
Michael Filippo, Jamshed Jalal, Klas Magnus Bruce, Paul Gilbert Meyer, David Joseph Hawkins +1 more |
2019-09-03 |
| 10324858 |
Access control |
Bruce James Mathewson, Matthew Evans, Paul Gilbert Meyer, Andrew Brookfield Swaine |
2019-06-18 |
| 10282297 |
Read-with overridable-invalidate transaction |
Bruce James Mathewson, Jamshed Jalal, Mark David Werkheiser |
2019-05-07 |
| 10223002 |
Compare-and-swap transaction |
Bruce James Mathewson, Klas Magnus Bruce, Geoffray Matthieu Lacourba |
2019-03-05 |
| 10185663 |
Cache bypass |
Jamshed Jalal, Michael Filippo, Bruce James Mathewson |
2019-01-22 |