Issued Patents 2019
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10523599 | Buffer sizing of a NoC through machine learning | Eric Norige, Sailesh Kumar | 2019-12-31 |
| 10469337 | Cost management against requirements for the generation of a NoC | William John Bainbridge, Eric Norige, Sailesh Kumar | 2019-11-05 |
| 10469338 | Cost management against requirements for the generation of a NoC | William John Bainbridge, Eric Norige, Sailesh Kumar | 2019-11-05 |
| 10419300 | Cost management against requirements for the generation of a NoC | William John Bainbridge, Eric Norige, Sailesh Kumar | 2019-09-17 |
| 10348563 | System-on-chip (SoC) optimization through transformation and generation of a network-on-chip (NoC) topology | Sailesh Kumar, Pier Giorgio Raponi | 2019-07-09 |
| 10298485 | Systems and methods for NoC construction | Pier Giorgio Raponi, Sailesh Kumar | 2019-05-21 |