Issued Patents 2019
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10303833 | Parallelizing timing-based operations for circuit designs | Aman Gayasen, Surya Pratik Saha, Elliott Delaye, Ashish Sirasao | 2019-05-28 |
| 10289786 | Circuit design transformation for automatic latency reduction | Chaithanya Dudha, Ashish Sirasao, Nithin Kumar Guggilla | 2019-05-14 |