Issued Patents 2019
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10411091 | Integrated circuits employing a field gate(s) without dielectric layers and/or work function metal layers for reduced gate layout parasitic resistance, and related methods | Kern Rim | 2019-09-10 |
| 10332881 | Integrating a gate-all-around (GAA) field-effect transistor(s) (FET(S)) and a finFET(s) on a common substrate of a semiconductor die | Kern Rim | 2019-06-25 |
| 10283526 | Standard cell circuits employing voltage rails electrically coupled to metal shunts for reducing or avoiding increases in voltage drop | John Jianhong Zhu, Jeffrey Junhao Xu | 2019-05-07 |