IK

Igor Keller

CS Cadence Design Systems: 3 patents #23 of 394Top 6%
📍 Pleasanton, CA: #71 of 704 inventorsTop 15%
🗺 California: #6,166 of 67,890 inventorsTop 10%
Overall (2019): #53,329 of 560,194Top 10%
4
Patents 2019

Issued Patents 2019

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
10430536 Method and apparatus for yield calculation using statistical timing data that accounts for path and stage delay correlation Praveen Ghanta, Mikhail Chetin 2019-10-01
10275554 Delay propagation for multiple logic cells using correlation and coskewness of delays and slew rates in an integrated circuit design Mikhail Chetin, Praveen Ghanta 2019-04-30
10192012 Pseudo-inverter configuration for signal electromigration analysis Jalal Wehbeh, Aswin Ramakrishnan, Federico Politi, Ajish Thomas 2019-01-29
10185795 Systems and methods for statistical static timing analysis Praveen Ghanta, Arun Kumar Mishra 2019-01-22