Issued Patents 2019
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10481203 | Granular dynamic test systems and methods | Shantanu Sarangi, Milind Sonawane, Adarsh Kalliat Balagopala | 2019-11-19 |
| 10473720 | Dynamic independent test partition clock | Pavan Kumar Datla Jagannadha, Dheepakkumaran Jayaraman, Anubhav Sinha, Karthikeyan Natarajan, Shantanu Sarangi +2 more | 2019-11-12 |
| 10451676 | Method and system for dynamic standard test access (DSTA) for a logic block reuse | Milind Sonawane, Shantanu Sarangi, Jonathon E. Colburn, Bala Tarun Nelapatla, Sailendra Chadalavda +3 more | 2019-10-22 |
| 10444280 | Independent test partition clock coordination across multiple test partitions | Dheepakkumaran Jayaraman, Karthikeyan Natarajan, Shantanu Sarangi, Milind Sonawane, Sailendra Chadalavda +4 more | 2019-10-15 |
| 10317463 | Scan system interface (SSI) module | Milind Sonawane, Jonathon E. Colburn, Rajendra Kumar reddy.S, Bala Tarun Nelapatla, Sailendra Chadalavda +1 more | 2019-06-11 |
| 10281524 | Test partition external input/output interface control for test partitions in a semiconductor | Sailendra Chadalavda, Shantanu Sarangi, Milind Sonawane, Jonathon E. Colburn, Dan Tobin Smith +2 more | 2019-05-07 |
| 10241148 | Virtual access of input/output (I/O) for test via an on-chip star network | Ashfaq R. Shaikh, Wen-Hung Lo, Punit Kishore, Krishna B. Rajan | 2019-03-26 |