Issued Patents 2019
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10324852 | System and method to increase availability in a multi-level memory configuration | Ashok Raj, Robert C. Swanson, Mohan J. Kumar | 2019-06-18 |
| 10318368 | Enabling error status and reporting in a machine check architecture | Ashok Raj | 2019-06-11 |
| 10319458 | Hardware apparatuses and methods to check data storage devices for transient faults | Ashok Raj, Ron Gabor, Hisham Shafi, Mohan J. Kumar | 2019-06-11 |
| 10296416 | Read from memory instructions, processors, methods, and systems, that do not take exception on defective data | Ashok Raj, Ron Gabor, Hisham Shafi, Sergiu D. Ghetie, Mohan J. Kumar +2 more | 2019-05-21 |
| 10223204 | Apparatus and method for detecting and recovering from data fetch errors | Geeyarpuram N. Santhanakrishnan, Ganapati Srinivasa, Jose A. Vargas, Hisham Shafi, Michael Mishaeli +5 more | 2019-03-05 |
| 10185619 | Handling of error prone cache line slots of memory side cache of multi-level system memory | Ashok Raj, Robert C. Swanson, Mohan J. Kumar | 2019-01-22 |