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Performing partial register write operations in a processor |
Jamison D. Collins, Sebastian Winkel |
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Hardware apparatuses and methods to fuse instructions |
Patrick P. Lai, Tyler Sondag, Sebastian Winkel, Polychronis Xekalakis, Ethan Schuchman |
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Method to do control speculation on loads in a high performance strand-based loop accelerator |
Alexander Y. Ostanevich, Sergey P. Scherbinin, Dmitry M. Maslennikov, Denis G. Motin, Alexander V. Ermolovich +3 more |
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Apparatus and methods to support counted loop exits in a multi-strand loop processor |
Sergey P. Scherbinin, Alexander Y. Ostanevich, Dmitry M. Maslennikov, Denis G. Motin, Alexander V. Ermolovich +3 more |
2019-03-26 |
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Method and apparatus to create register windows for parallel iterations to achieve high performance in HW-SW codesigned loop accelerator |
Sergey P. Scherbinin, Alexander Y. Ostanevich, Dmitry M. Maslennikov, Denis G. Motin, Alexander V. Ermolovich +3 more |
2019-03-26 |
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Method and apparatus to efficiently handle allocation of memory ordering buffers in a multi-strand out-of-order loop processor |
Alexander Y. Ostanevich, Sergey P. Scherbinin, Dmitry M. Maslennikov, Denis G. Motin, Alexander V. Ermolovich +3 more |
2019-03-19 |