BT

Brian W. Thompto

IBM: 21 patents #162 of 11,143Top 2%
Overall (2019): #1,870 of 560,194Top 1%
21
Patents 2019

Issued Patents 2019

Patent #TitleCo-InventorsDate
10496406 Handling unaligned load operations in a multi-slice computer processor Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le, Jentje Leenstra +2 more 2019-12-03
10467135 Multi-section garbage collection Giles R. Frazier, Michael K. Gschwind, Younes Manton, Karl M. Taylor 2019-11-05
10445100 Broadcasting messages between execution slices for issued instructions indicating when execution results are ready Salma Ayub, Joshua W. Bowman, Jeffrey C. Brownscheidle, Sundeep Chadha, Dhivya Jeganathan +2 more 2019-10-15
10437756 Operation of a multi-slice processor implementing datapath steering Steven R. Carlough, Kurt A. Feiste, Phillip G. Williams 2019-10-08
10417152 Operation of a multi-slice processor implementing datapath steering Steven R. Carlough, Kurt A. Feiste, Phillip G. Williams 2019-09-17
10409598 Handling unaligned load operations in a multi-slice computer processor Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le, Jentje Leenstra +2 more 2019-09-10
10394565 Managing an issue queue for fused instructions and paired instructions in a microprocessor Michael J. Genden, Hung Q. Le, Dung Q. Nguyen 2019-08-27
10387147 Managing an issue queue for fused instructions and paired instructions in a microprocessor Michael J. Genden, Hung Q. Le, Dung Q. Nguyen 2019-08-20
10379867 Asynchronous flush and restore of distributed history buffer David R. Terry, Dung Q. Nguyen, Joshua W. Bowman, Steven J. Battle, Brian D. Barrick +2 more 2019-08-13
10379857 Dynamic sequential instruction prefetching Richard J. Eickemeyer, Sheldon B. Levenstein, David S. Levitan, Mauricio J. Serrano 2019-08-13
10331566 Operation of a multi-slice processor implementing adaptive prefetch control Bradly G. Frey, George W. Rohrbaugh, III 2019-06-25
10235181 Out-of-order processor and method for back to back instruction issue 2019-03-19
10223125 Linkable issue queue parallel execution slice processing method Jeffrey C. Brownscheidle, Sundeep Chadha, Maureen A. Delaney, Hung Q. Le, Dung Q. Nguyen 2019-03-05
10223266 Extended store forwarding for store misses without cache allocate Robert A. Cordes, Hung Q. Le 2019-03-05
10223257 Multi-section garbage collection Giles R. Frazier, Michael K. Gschwind, Younes Manton, Karl M. Taylor 2019-03-05
10223126 Out-of-order processor and method for back to back instruction issue 2019-03-05
10191845 Prefetch performance Bernard C. Drerup, Richard J. Eickemeyer, Guy L. Guthrie, Mohit Karve, George W. Rohrbaugh, III 2019-01-29
10191847 Prefetch performance Bernard C. Drerup, Richard J. Eickemeyer, Guy L. Guthrie, Mohit Karve, George W. Rohrbaugh, III 2019-01-29
10176038 Partial ECC mechanism for a byte-write capable register Dhivya Jeganathan, Dung Q. Nguyen, Jose Angel Paredes, David R. Terry 2019-01-08
10169228 Multi-section garbage collection Giles R. Frazier, Michael K. Gschwind, Younes Manton, Karl M. Taylor 2019-01-01
10169046 Out-of-order processor that avoids deadlock in processing queues by designating a most favored instruction Maarten J. Boersma, Robert A. Cordes, David A. Hrusecky, Jennifer L. Molnar, Albert J. Van Norstrand, Jr. +1 more 2019-01-01