Issued Patents 2019
Showing 1–25 of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10496412 | Parallel dispatching of multi-operation instructions in a multi-slice computer processor | Kurt A. Feiste, Michael J. Genden, Paul M. Kennedy | 2019-12-03 |
| 10496406 | Handling unaligned load operations in a multi-slice computer processor | Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le, Jentje Leenstra +2 more | 2019-12-03 |
| 10489253 | On-demand GPR ECC error detection and scrubbing for a multi-slice microprocessor | Steven J. Battle, Joshua W. Bowman, Sundeep Chadha, Dhivya Jeganathan, Cliff Kucharski +2 more | 2019-11-26 |
| 10445100 | Broadcasting messages between execution slices for issued instructions indicating when execution results are ready | Salma Ayub, Joshua W. Bowman, Jeffrey C. Brownscheidle, Sundeep Chadha, Dhivya Jeganathan +2 more | 2019-10-15 |
| 10423423 | Efficiently managing speculative finish tracking and error handling for load instructions | Susan E. Eisen, David A. Hrusecky, Christopher M. Mueller, A. James Van Norstrand, Jr., Kenneth L. Ward | 2019-09-24 |
| 10409598 | Handling unaligned load operations in a multi-slice computer processor | Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le, Jentje Leenstra +2 more | 2019-09-10 |
| 10394565 | Managing an issue queue for fused instructions and paired instructions in a microprocessor | Michael J. Genden, Hung Q. Le, Brian W. Thompto | 2019-08-27 |
| 10387147 | Managing an issue queue for fused instructions and paired instructions in a microprocessor | Michael J. Genden, Hung Q. Le, Brian W. Thompto | 2019-08-20 |
| 10379867 | Asynchronous flush and restore of distributed history buffer | David R. Terry, Brian W. Thompto, Joshua W. Bowman, Steven J. Battle, Brian D. Barrick +2 more | 2019-08-13 |
| 10318356 | Operation of a multi-slice processor implementing a hardware level transfer of an execution thread | Brian D. Barrick, James Wilson Bishop, Marcy E. Byers, Sundeep Chadha, Cliff Kucharski +2 more | 2019-06-11 |
| 10318294 | Operation of a multi-slice processor implementing dependency accumulation instruction sequencing | Khandker N. Adeeb, Joshua W. Bowman, Jeffrey C. Brownscheidle, Brandon Goddard, Tu-An T. Nguyen +2 more | 2019-06-11 |
| 10296339 | Thread transition management | Christopher M. Abernathy, Mary D. Brown, Susan E. Eisen, James Allan Kahle, Hung Q. Le | 2019-05-21 |
| 10296337 | Preventing premature reads from a general purpose register | Steven J. Battle, Owen Chiang, Sam Gat-Shang Chu, Saiful Islam, David R. Terry +1 more | 2019-05-21 |
| 10289415 | Method and apparatus for execution of threads on processing slices using a history buffer for recording architected register data | Susan E. Eisen, Cliff Kucharski, Hung Q. Le, David R. Terry | 2019-05-14 |
| 10282207 | Multi-slice processor issue of a dependent instruction in an issue queue based on issue of a producer instruction | Brian D. Barrick, Sundeep Chadha, Michael J. Genden, Jerry Y. Lu, Nasrin Sultana +2 more | 2019-05-07 |
| 10282205 | Method and apparatus for execution of threads on processing slices using a history buffer for restoring architected register data via issued instructions | Susan E. Eisen, Cliff Kucharski, Hung Q. Le, David R. Terry | 2019-05-07 |
| 10275251 | Processor for avoiding reduced performance using instruction metadata to determine not to maintain a mapping of a logical register to a physical register in a first level register file | Christopher M. Abernathy, Mary D. Brown | 2019-04-30 |
| 10268482 | Multi-slice processor issue of a dependent instruction in an issue queue based on issue of a producer instruction | Brian D. Barrick, Sundeep Chadha, Michael J. Genden, Jerry Y. Lu, Nasrin Sultana +2 more | 2019-04-23 |
| 10255071 | Method and apparatus for managing a speculative transaction in a processing unit | Salma Ayub, Susan E. Eisen, Glenn O. Kincaid, Cliff Kucharski, Christopher M. Mueller +1 more | 2019-04-09 |
| 10248426 | Direct register restore mechanism for distributed history buffers | Brian D. Barrick, Steven J. Battle, Joshua W. Bowman, Christopher M. Mueller, David R. Terry +2 more | 2019-04-02 |
| 10248421 | Operation of a multi-slice processor with reduced flush and restore latency | Salma Ayub, Brian D. Barrick, Joshua W. Bowman, Sundeep Chadha, Cliff Kucharski +2 more | 2019-04-02 |
| 10241790 | Operation of a multi-slice processor with reduced flush and restore latency | Salma Ayub, Brian D. Barrick, Joshua W. Bowman, Sundeep Chadha, Cliff Kucharski +2 more | 2019-03-26 |
| 10241800 | Split-level history buffer in a computer processing unit | Hung Q. Le, David R. Terry | 2019-03-26 |
| 10223196 | ECC scrubbing method in a multi-slice microprocessor | Brian D. Barrick, James Wilson Bishop, Maarten J. Boersma, Marcy E. Byers, Sundeep Chadha +2 more | 2019-03-05 |
| 10223125 | Linkable issue queue parallel execution slice processing method | Jeffrey C. Brownscheidle, Sundeep Chadha, Maureen A. Delaney, Hung Q. Le, Brian W. Thompto | 2019-03-05 |