| 10516833 |
Virtual linebuffers for image signal processors |
Ofer Shacham, Jason Redgrave, Daniel Frederic Finchelstein, Albert Meixner |
2019-12-24 |
| 10430919 |
Determination of per line buffer unit memory allocation |
Hyunchul Park, Albert Meixner, William R. Mark |
2019-10-01 |
| 10417732 |
Architecture for high performance, power efficient, programmable image processing |
Ofer Shacham, Albert Meixner, Jason Redgrave, Daniel Frederic Finchelstein, David Patterson +4 more |
2019-09-17 |
| 10397450 |
Two dimensional shift array for image processor |
Ofer Shacham, Jason Redgrave, Albert Meixner, Daniel Frederic Finchelstein, David Patterson +1 more |
2019-08-27 |
| 10321077 |
Line buffer unit for image processor |
Neeti Desai, Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2019-06-11 |
| 10304156 |
Compiler managed memory for image processor |
Albert Meixner, Hyunchul Park, Jason Redgrave |
2019-05-28 |
| 10291813 |
Sheet generator for image processor |
Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2019-05-14 |
| 10284744 |
Sheet generator for image processor |
Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2019-05-07 |
| 10277833 |
Virtual linebuffers for image signal processors |
Ofer Shacham, Jason Redgrave, Daniel Frederic Finchelstein, Albert Meixner |
2019-04-30 |
| 10275253 |
Energy efficient processor core architecture for image processor |
Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2019-04-30 |
| 10216487 |
Virtual image processor instruction set architecture (ISA) and memory model and exemplary target hardware having a two-dimensional shift array structure |
Albert Meixner, Ofer Shacham, David Patterson, Daniel Frederic Finchelstein, Jason Redgrave |
2019-02-26 |
| 10204396 |
Compiler managed memory for image processor |
Albert Meixner, Hyunchul Park, Jason Redgrave |
2019-02-12 |
