Issued Patents 2019
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10483172 | Transistor device structures with retrograde wells in CMOS applications | Vara Govindeswara Reddy Vakada, Laegu Kang, Michael Ganz, Yi Qi, Puneet Khanna +2 more | 2019-11-19 |
| 10424584 | Semiconductor memory devices having an undercut source/drain region | Hui Zang | 2019-09-24 |
| 10290654 | Circuit structures with vertically spaced transistors and fabrication methods | Hui Zang, Min-hwa Chi | 2019-05-14 |
| 10249616 | Methods of forming a resistor structure between adjacent transistor gates on an integrated circuit product and the resulting devices | Hui Zang, Haiting Wang, Daniel Jaeger | 2019-04-02 |
| 10243059 | Source/drain parasitic capacitance reduction in FinFET-based semiconductor structure having tucked fins | Srikanth Balaji Samavedan, Min-hwa Chi, Hui Zang | 2019-03-26 |