Issued Patents 2019
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10522655 | Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dial raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOI | George R. Mulfinger, Rick Carter, Peter Baars, Hans-Jürgen Thees, Jan Höntschel | 2019-12-31 |
| 10326007 | Post gate silicon germanium channel condensation and method for producing the same | George R. Mulfinger, Timothy J. McArdle, Judson R. Holt | 2019-06-18 |
| 10217660 | Technique for patterning active regions of transistor elements in a late manufacturing stage | George R. Mulfinger | 2019-02-26 |