Issued Patents 2019
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10417363 | Power and scan resource reduction in integrated circuit designs having shift registers | Jagjot Kaur, Priyanka Dasgupta, Pratyush Aditya Kothamasu | 2019-09-17 |
| 10331506 | SoC top-level XOR compactor design to efficiently test and diagnose multiple identical cores | Christos Papameletis, Krishna Vijaya Chakravadhanula, Brian Foutz | 2019-06-25 |
| 10234504 | Optimizing core wrappers in an integrated circuit | Subhasish Mukherjee, Jagjot Kaur, Susan Marie Genova | 2019-03-19 |