Issued Patents 2018
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10073627 | Addressing, interleave, wear leveling, and initialization schemes for different chip enables and memory arrays of different types | Narendhiran Chinnaanangur Ravimohan, Muralitharan Jayaraman, Vijay Sivasankaran, Krishnamurthy Dhakshinamurthy | 2018-09-11 |