Issued Patents 2018
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10114562 | Adaptive block allocation in nonvolatile memory | Muralitharan Jayaraman, Abhijeet Manohar, Alan David Bennett | 2018-10-30 |
| 10073627 | Addressing, interleave, wear leveling, and initialization schemes for different chip enables and memory arrays of different types | Muralitharan Jayaraman, Vijay Sivasankaran, Krishnamurthy Dhakshinamurthy, Arun Thandapani | 2018-09-11 |
| 9983829 | Physical addressing schemes for non-volatile memory systems employing multi-die interleave schemes | Muralitharan Jayaraman | 2018-05-29 |
| 9978462 | Partial soft bit read | Muralitharan Jayaraman, Abhijeet Manohar, Idan Alrod | 2018-05-22 |
| 9891847 | Block management in a dual write memory system | Abhijeet Manohar, Muralitharan Jayaraman | 2018-02-13 |
| 9886080 | Low voltage detection and initialization for non-volatile memory systems | Anil Kumar Thadi Suryaprakash, Krishnamurthy Dhakshinamurthy, Ajay Dhingra, Rampraveen Somasundaram, Bhavin Odedara +2 more | 2018-02-06 |