RH

Rodney E. Hooker

VC Via Alliance Semiconductor Co.: 11 patents #4 of 83Top 5%
VT Via Technologies: 4 patents #5 of 43Top 15%
Overall (2018): #2,640 of 503,207Top 1%
15
Patents 2018

Issued Patents 2018

Patent #TitleCo-InventorsDate
10146543 Conversion system for a processor with an expandable instruction set architecture for dynamically configuring execution resources G. Glenn Henry, Terry Parks, Douglas R. Reed 2018-12-04
10127041 Compiler system for a processor with an expandable instruction set architecture for dynamically configuring execution resources G. Glenn Henry, Terry Parks, Douglas R. Reed 2018-11-13
10073787 Dynamic powering of cache memory by ways within multiple set groups based on utilization trends Douglas R. Reed 2018-09-11
10067871 Logic analyzer for detecting hangs Douglas R. Reed 2018-09-04
10019260 Fingerprint units comparing stored static fingerprints with dynamically generated fingerprints and reconfiguring processor settings upon a fingerprint match G. Glenn Henry, Colin Eddy, Terry Parks 2018-07-10
9972375 Sanitize-aware DRAM controller Terry Parks, Douglas R. Reed 2018-05-15
9952875 Microprocessor with ALU integrated into store unit Gerard M. Col, Colin Eddy 2018-04-24
9946651 Pattern detector for detecting hangs Douglas R. Reed 2018-04-17
9910785 Cache memory budgeted by ways based on memory access type Douglas R. Reed, John Michael Greer, Colin Eddy 2018-03-06
9911508 Cache memory diagnostic writeback Stephan Gaskins, Douglas R. Reed, Jason Chen 2018-03-06
9898411 Cache memory budgeted by chunks based on memory access type Douglas R. Reed, John Michael Greer, Colin Eddy 2018-02-20
9898291 Microprocessor with arm and X86 instruction length decoders G. Glenn Henry, Terry Parks 2018-02-20
9891918 Fractional use of prediction history storage for operating system routines Terry Parks, John Bunda 2018-02-13
9891927 Inter-core communication via uncore RAM G. Glenn Henry, Terry Parks, Stephan Gaskins 2018-02-13
9891916 Dynamically updating hardware prefetch trait to exclusive or shared in multi-memory access agent system Albert J. Loper, John Michael Greer, Meera Ramani-Augustin 2018-02-13