Issued Patents 2018
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10134479 | Non-volatile memory with reduced program speed variation | Yingda Dong | 2018-11-20 |
| 10038005 | Sense circuit having bit line clamp transistors with different threshold voltages for selectively boosting current in NAND strings | Henry Chin, Yingda Dong | 2018-07-31 |
| 9984760 | Suppressing disturb of select gate transistors during erase in memory | Liang Pang, Yingda Dong | 2018-05-29 |
| 9959932 | Grouping memory cells into sub-blocks for program speed uniformity | Yingda Dong, James Kai, Johann Alsmeier | 2018-05-01 |
| 9922705 | Reducing select gate injection disturb at the beginning of an erase operation | Vinh Diep, Xuehong Yu, Yingda Dong | 2018-03-20 |
| 9887002 | Dummy word line bias ramp rate during programming | Yingda Dong | 2018-02-06 |