TK

Toshiya Kotani

Toshiba Memory: 3 patents #110 of 956Top 15%
Overall (2018): #53,997 of 503,207Top 15%
3
Patents 2018

Issued Patents 2018

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
9977855 Method of wiring layout, semiconductor device, program for supporting design of wiring layout, and method for manufacturing semiconductor device Chikaaki Kodama, Koichi Nakayama, Shigeki Nojima, Fumiharu Nakajima, Hirotaka Ichikawa 2018-05-22
9953126 Method of wiring layout, semiconductor device, program for supporting design of wiring layout, and method for manufacturing semiconductor device Chikaaki Kodama, Koichi Nakayama, Shigeki Nojima, Fumiharu Nakajima, Hirotaka Ichikawa 2018-04-24
9917049 Semiconductor device having contacts in drawing area and the contacts connected to word lines extending from element formation area Fumiharu Nakajima, Hiromitsu Mashita, Takafumi Taguchi, Ryota Aburada, Chikaaki Kodama 2018-03-13