Issued Patents 2018
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10163468 | Multiple register memory access instructions, processors, methods, and systems | Glenn J. Hinton, Bret L. Toll | 2018-12-25 |
| 10153011 | Multiple register memory access instructions, processors, methods, and systems | Glenn J. Hinton, Bret L. Toll | 2018-12-11 |
| 10153012 | Multiple register memory access instructions, processors, methods, and systems | Glenn J. Hinton, Bret L. Toll | 2018-12-11 |
| 10141033 | Multiple register memory access instructions, processors, methods, and systems | Glenn J. Hinton, Bret L. Toll | 2018-11-27 |
| 10102888 | Multiple register memory access instructions, processors, methods, and systems | Glenn J. Hinton, Bret L. Toll | 2018-10-16 |
| 10089229 | Cache allocation with code and data prioritization | Andrew J. Herdrich, Edwin Verplanke, Ravishankar Iyer, Christopher C. Gianos, Jeffrey D. Chamberlain +2 more | 2018-10-02 |
| 9990202 | Packed data element predication processors, methods, systems, and instructions | Bret L. Toll, Buford M. Guy, Mishali Naik | 2018-06-05 |
| 9858167 | Monitoring the operation of a processor | Gilbert Neiger, Andrew V. Anderson, Richard Uhlig, David M. Durham, Xiangbin Wu +1 more | 2018-01-02 |