Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
ML

Mark Liu

INIntel: 2 patents #1,186 of 5,158Top 25%
San Francisco, CA: #1,067 of 5,438 inventorsTop 20%
California: #12,239 of 60,411 inventorsTop 25%
Overall (2018): #123,047 of 503,207Top 25%
2 Patents 2018

Issued Patents 2018

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10084087 Enhanced dislocation stress transistor Cory E. Weber, Anand S. Murthy, Hemant Deshpande, Daniel B. Aubertine 2018-09-25
10020232 Integrated circuits with recessed gate electrodes Srijit Mukherjee, Christopher J. Wiegand, Tyler J. Weeks, Michael L. Hattendorf 2018-07-10