Issued Patents 2018
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10068874 | Method for direct integration of memory die to logic die without use of thru silicon vias (TSV) | Donald W. Nelson, M Clair Webb, Patrick Morrow | 2018-09-04 |
| 10043797 | Techniques for forming vertical transistor architectures | Patrick Morrow | 2018-08-07 |
| 10014374 | Planar heterogeneous device | Patrick Morrow | 2018-07-03 |
| 9935191 | High electron mobility transistor fabrication process on reverse polarized substrate by layer transfer | Sansaptak Dasgupta, Alejandro X. Levander, Patrick Morrow | 2018-04-03 |
| 9920438 | Methods and apparatus for ultrathin catalyst layer for photoelectrode | Joseph M. Jacobson | 2018-03-20 |