Issued Patents 2018
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10162756 | Memory-efficient last level cache architecture | Ayan Mandal, Anant Vithal Nori, Sreenivas Subramoney | 2018-12-25 |
| 10013352 | Partner-aware virtual microsectoring for sectored cache architectures | Sreenivas Subramoney, Mukesh Agrawal, Mainak Chaudhuri | 2018-07-03 |