Issued Patents 2018
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9960110 | Self-enclosed asymmetric interconnect structures | — | 2018-05-01 |
| 9876113 | Method for improving transistor performance through reducing the salicide interface resistance | Anand S. Murthy, Glenn A. Glass, Thomas Hoffmann | 2018-01-23 |