Issued Patents 2018
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10147639 | Via self alignment and shorting improvement with airgap integration capacitance benefit | Kanwal Jit Singh | 2018-12-04 |
| 10032643 | Method and structure to contact tight pitch conductive layers with guided vias using alternating hardmasks and encapsulating etchstop liner scheme | Jasmeet S. Chawla, Ruth A. Brain, Richard E. Schenker, Kanwal Jit Singh | 2018-07-24 |
| 9887161 | Techniques for forming interconnects in porous dielectric materials | Christopher J. Jezewski, David J. Michalak, Kanwal Jit Singh | 2018-02-06 |