Issued Patents 2018
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10163812 | Device having substrate with conductive pillars | Chau Fatt Chiang, Kok Yau Chua, Chee Yang Ng, Valentyn Solomko | 2018-12-25 |
| 10099411 | Method and apparatus for simultaneously encapsulating semiconductor dies with layered lead frame strips | Choon Huey Wang, Chau Fatt Chiang, Chee Hong Fang | 2018-10-16 |
| 9868632 | Molded cavity package with embedded conductive layer and enhanced sealing | Chau Fatt Chiang, Kok Yau Chua, Chee Yang Ng, Horst Theuss | 2018-01-16 |