Issued Patents 2018
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10114920 | Method and apparatus for performing sign-off timing analysis of circuit designs using inter-power domain logic | Shashank Tripathi, Naresh Kumar, Arvind Nembili Veeravalli, Prashant Sethia, Ritika Govila | 2018-10-30 |
| 9875333 | Comprehensive path based analysis process | Sourabh Kumar Verma, Naresh Kumar, Ajay Tomar, Rakesh Agarwal, Manish Bansal +2 more | 2018-01-23 |