GY

Guangxi Ying

CS Cadence Design Systems: 2 patents #20 of 223Top 9%
Overall (2018): #146,662 of 503,207Top 30%
2
Patents 2018

Issued Patents 2018

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10067689 Method and apparatus for high bandwidth memory read and write data path training Zhehong Qian, Xiaobo ZHANG, Yanjuan Zhan 2018-09-04
9881664 Per-group delay line architecture to de-skew input/output timing between a high bandwidth memory (HBM) physical (PHY) interface and the HBM device Yanjuan Zhan, Zhehong Qian, Ying Li 2018-01-30