Issued Patents 2018
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10141264 | Method and structure for wafer level packaging with large contact area | — | 2018-11-27 |
| 10043736 | Hybrid packaged lead frame based multi-chip semiconductor device with multiple interconnecting structures | Hamza Yilmaz, Jun Lu, Peter H. Wilson, Yan Huo, Zhiqiang Niu +1 more | 2018-08-07 |
| 9966328 | Semiconductor power device having single in-line lead module and method of making the same | Zhiqiang Niu | 2018-05-08 |
| 9960119 | Method and structure for wafer level packaging with large contact area | — | 2018-05-01 |
| 9929076 | Semiconductor package of a flipped MOSFET chip and a multi-based die paddle with top surface groove-divided multiple connecting areas for connection to the flipped MOSFET electrodes | Yueh-Se Ho, Hamza Yilmaz, Jun Lu | 2018-03-27 |