Issued Patents 2017
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9818676 | Singulation method for semiconductor package with plating on side of connectors | Somchai Nondhasitthichai | 2017-11-14 |
| 9805955 | Semiconductor package with multiple molding routing layers and a method of manufacturing the same | Suebphong Yenrudee | 2017-10-31 |
| 9773722 | Semiconductor package with partial plating on contact side surfaces | Somchai Nondhasitthichai, Woraya Benjavasukul | 2017-09-26 |
| 9761435 | Flip chip cavity package | Somchai Nondhasitthichai | 2017-09-12 |
| 9741642 | Semiconductor package with partial plating on contact side surfaces | Somchai Nondhasitthichai, Woraya Benjasukul | 2017-08-22 |
| 9711343 | Molded leadframe substrate semiconductor package | Somchai Nondhasitthichai | 2017-07-18 |
| 9564387 | Semiconductor package having routing traces therein | Antonio B. Dimaano, Jr., Rui Huang | 2017-02-07 |