Issued Patents 2017
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9830416 | Method for analog circuit placement | I-Peng Wu, Hung-Chih Ou, Yu-Tsang Hsieh | 2017-11-28 |
| 9825117 | MIM/RRAM structure with improved capacitance and reduced leakage current | Jian-Shiou Huang, Hsing-Lien Lin, Cheng-Yuan Tsai, Chia-Shiung Tsai | 2017-11-21 |
| 9818885 | Deposited material and method of formation | Cheng-Yuan Tsai, Hsing-Lien Lin | 2017-11-14 |
| 9761799 | Bottom electrode structure for improved electric field uniformity | Jian-Shiou Huang, Cheng-Yuan Tsai | 2017-09-12 |
| 9722011 | Film scheme for MIM device | Hsing-Lien Lin, Cheng-Yuan Tsai, Chia-Shiung Tsai | 2017-08-01 |
| 9711713 | Semiconductor structure, electrode structure and method of forming the same | Chung-Yen Chou, Fu-Ting Sung, Shih-Chang Liu | 2017-07-18 |
| 9685389 | Formation of getter layer for memory device | Cheng-Yuan Tsai, Kai-Wen Cheng | 2017-06-20 |
| 9633920 | Low damage passivation layer for III-V based devices | Han-Chin Chiu, Cheng-Yuan Tsai, Ming-Wei Tsai, Wen-Yuan Hsieh | 2017-04-25 |
| 9625520 | Latch-up test device and method for testing wafer under test | Shih-Yu Wang, Tao-Cheng Lu | 2017-04-18 |
| 9604910 | Composition of 5-nitrobenzoate derivatives as anti-metastatic agent that inhibits tumor cell-induced platelet aggregation | Ching-Ping Tseng, Pei-Wen Hsieh | 2017-03-28 |
| 9558988 | Method for filling the trenches of shallow trench isolation (STI) regions | Chia-Shiung Tsai, Cheng-Yuan Tsai | 2017-01-31 |
| 9543375 | MIM/RRAM structure with improved capacitance and reduced leakage current | Jian-Shiou Huang, Hsing-Lien Lin, Cheng-Yuan Tsai, Chia-Shiung Tsai | 2017-01-10 |