Issued Patents 2017
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9658538 | System and technique for rasterizing circuit layout data | Pei-Yi Liu, Cheng-Chi Wu, Cheng-Hung Chen, Wen-Chuan Wang, Shy-Jay Lin | 2017-05-23 |
| 9594862 | Method of fabricating an integrated circuit with non-printable dummy features | Cheng-Hung Chen, Pei-Yi Liu, Wen-Chuan Wang, Shy-Jay Lin, Burn Jeng Lin | 2017-03-14 |
| 9552964 | Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity | Cheng-Hung Chen, Pei-Yi Liu, Wen-Chuan Wang, Shy-Jay Lin, Burn Jeng Lin | 2017-01-24 |