| 9823928 |
FIFO load instruction |
Mao Zeng, Erich James Plondke, Ajay Anant Ingle |
2017-11-21 |
| 9824013 |
Per thread cacheline allocation mechanism in shared partitioned caches in multi-threaded processors |
Christopher Edward Koob, Ajay Anant Ingle, Suresh K. Venkumahanti |
2017-11-21 |
| 9785434 |
Fast minimum and maximum searching instruction |
Erich James Plondke, Mao Zeng, Swaminathan Balasubramanian, David Hoyle |
2017-10-10 |
| 9715392 |
Multiple clustered very long instruction word processing core |
Suresh K. Venkumahanti, Ankit Ghiya, Peter G. Sassone, Suman Mamidi |
2017-07-25 |
| 9678758 |
Coprocessor for out-of-order loads |
Christopher Edward Koob, Eric W. Mahurin, Suresh K. Venkumahanti |
2017-06-13 |
| 9678754 |
System and method of processing hierarchical very long instruction packets |
Erich James Plondke, Ajay Anant Ingle, Suresh K. Venkumahanti, Charles Joseph Tabony |
2017-06-13 |
| 9632781 |
Vector register addressing and functions based on a scalar register data value |
Ajay Anant Ingle, Marc Hoffman, Jose Fridman |
2017-04-25 |
| 9626579 |
Increasing canny filter implementation speed |
Kim-Chyan Gan, Mao Zeng |
2017-04-18 |
| 9606818 |
Systems and methods of executing multiple hypervisors using multiple sets of processors |
Erich James Plondke, Christopher Edward Koob, Piyush Patel, Thomas Andrew Sartorius |
2017-03-28 |