Issued Patents 2017
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9847294 | Semiconductor device allowing metal layer routing formed directly under metal pad | Tien-Chang Chang, Chien-Chih Lin | 2017-12-19 |
| 9846606 | Storage device calibration methods and controlling device using the same | — | 2017-12-19 |
| 9824971 | Semiconductor device allowing metal layer routing formed directly under metal pad | — | 2017-11-21 |
| 9761687 | Method of forming gate dielectric layer for MOS transistor | Han-Lin Hsu, Po-Lun Cheng, Meng-Che Yeh, Shih-Jung Tu | 2017-09-12 |
| 9722832 | Frequency control circuit, frequency control method and phase locked loop circuit | Shih-Che Hung | 2017-08-01 |
| 9627336 | Semiconductor device allowing metal layer routing formed directly under metal pad | Tien-Chang Chang, Chien-Chih Lin | 2017-04-18 |
| 9536833 | Semiconductor device allowing metal layer routing formed directly under metal pad | — | 2017-01-03 |