Issued Patents 2017
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9843333 | Reference-frequency-insensitive phase locked loop | — | 2017-12-12 |
| 9825640 | Method and system for time interleaved analog-to-digital converter timing mismatch estimation and compensation | Pawandeep Taluja, Mingrui Zhu, Xuefeng Chen, Anand Anandakumar, Timothy Gallagher | 2017-11-21 |
| 9800253 | Method and system for asynchronous successive approximation register (SAR) analog-to-digital converters (ADCs) | Eric Fogleman, Xuefeng Chen, Kok Lim Chan | 2017-10-24 |
| 9768852 | Transceiver array | Curtis Ling | 2017-09-19 |
| 9685983 | Outdoor unit resonator correction | Subramanian Anantharaman Chandrasekarapuram, Anand Anandakumar, Stephane Laurent-Michel, Raja Pullela, Glenn Chang +1 more | 2017-06-20 |
| 9650150 | Translucent seal cap | Jonathan D. Zook, Larry S. Hebert, Michael D. Swan, Susan E. DeMoss, Robin E. Wright | 2017-05-16 |
| 9609599 | Channel-sensitive power control | James Qiu, Sridhar Ramesh, Curtis Ling | 2017-03-28 |
| 9577655 | Method and system for time interleaved analog-to-digital converter timing mismatch estimation and compensation | Pawandeep Taluja, Mingrui Zhu, Xuefeng Chen, Anand Anandakumar, Timothy Gallagher | 2017-02-21 |
| 9565464 | Method and system for multi-path video and network channels | Anand Anandakumar, Curtis Ling | 2017-02-07 |
| 9537494 | Reference-frequency-insensitive phase locked loop | — | 2017-01-03 |
| 9537503 | Method and system for asynchronous successive approximation analog-to-digital convertor (ADC) architecture | Xuefeng Chen, Kok Lim Chan, Eric Fogleman | 2017-01-03 |