Issued Patents 2017
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9842944 | Solid-source diffused junction for fin-based electronics | Chia-Hong Jan | 2017-12-12 |
| 9806095 | High voltage three-dimensional devices having dielectric liners | Jeng-Ya David Yeh, Curtis Tsai, Joodong Park, Chia-Hong Jan, Gopinath Bhimarasetti | 2017-10-31 |
| 9799668 | Memory cell having isolated charge sites and method of fabricating same | Ting Chang, Chia-Hong Jan | 2017-10-24 |
| 9786783 | Transistor architecture having extended recessed spacer and source/drain regions and method of making same | Joodong Park, Jeng-Ya David Yeh, Chia-Hong Jan, Curtis Tsai | 2017-10-10 |
| 9780217 | Non-planar semiconductor device having self-aligned fin with top blocking layer | Jeng-Ya David Yeh, Chia-Hong Jan, Joodong Park | 2017-10-03 |
| 9748327 | Pillar resistor structures for integrated circuitry | Chen-Guan Lee, Chia-Hong Jan | 2017-08-29 |
| 9748252 | Antifuse element utilizing non-planar topology | Chia-Hong Jan, Curtis Tsai, Joodong Park, Jeng-Ya David Yeh | 2017-08-29 |
| 9741721 | Low leakage non-planar access transistor for embedded dynamic random access memory (eDRAM) | Joodong Park, Gopinath Bhimarasetti, Rahul Ramaswamy, Chia-Hong Jan, Jeng-Ya David Yeh +1 more | 2017-08-22 |
| 9570467 | High voltage three-dimensional devices having dielectric liners | Jeng-Ya David Yeh, Curtis Tsai, Joodong Park, Chia-Hong Jan, Gopinath Bhimarasetti | 2017-02-14 |