Issued Patents 2017
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9806095 | High voltage three-dimensional devices having dielectric liners | Walid M. Hafez, Curtis Tsai, Joodong Park, Chia-Hong Jan, Gopinath Bhimarasetti | 2017-10-31 |
| 9786783 | Transistor architecture having extended recessed spacer and source/drain regions and method of making same | Walid M. Hafez, Joodong Park, Chia-Hong Jan, Curtis Tsai | 2017-10-10 |
| 9780217 | Non-planar semiconductor device having self-aligned fin with top blocking layer | Chia-Hong Jan, Walid M. Hafez, Joodong Park | 2017-10-03 |
| 9748252 | Antifuse element utilizing non-planar topology | Walid M. Hafez, Chia-Hong Jan, Curtis Tsai, Joodong Park | 2017-08-29 |
| 9741721 | Low leakage non-planar access transistor for embedded dynamic random access memory (eDRAM) | Joodong Park, Gopinath Bhimarasetti, Rahul Ramaswamy, Chia-Hong Jan, Walid M. Hafez +1 more | 2017-08-22 |
| 9570467 | High voltage three-dimensional devices having dielectric liners | Walid M. Hafez, Curtis Tsai, Joodong Park, Chia-Hong Jan, Gopinath Bhimarasetti | 2017-02-14 |