Issued Patents 2017
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9826176 | Shared-counter image sensor | — | 2017-11-21 |
| 9691504 | DRAM retention test method for dynamic error correction | Ely Tsern, Frederick A. Ware, Suresh Rajan | 2017-06-27 |
| 9681071 | Image sensor with exception-coded output compression | Craig M. Smith, Michael Guidash, Jay Endsley, James E. Harris | 2017-06-13 |
| 9666238 | Stacked DRAM device and method of manufacture | — | 2017-05-30 |
| 9667898 | Conditional-reset, multi-bit read-out image sensor | Michael Guidash, Song S. Xue | 2017-05-30 |
| 9575835 | Error correction in a memory device | Suresh Rajan, Ian Shaeffer, Frederick A. Ware, Wayne F. Ellis | 2017-02-21 |
| 9570126 | Memory with deferred fractional row activation | James E. Harris, Frederick A. Ware, Ian Shaeffer | 2017-02-14 |
| 9570196 | Testing through-silicon-vias | William N. Ng, Frederick A. Ware | 2017-02-14 |
| 9570144 | Memory refresh method and devices | Richard E. Perego, John Brooks | 2017-02-14 |
| 9548102 | Multi-die DRAM banks arrangement and wiring | — | 2017-01-17 |