Issued Patents 2017
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9646880 | Monolithic three dimensional memory arrays formed using sacrificial polysilicon pillars | Seje Takaki | 2017-05-09 |
| 9608043 | Method of operating memory array having divided apart bit lines and partially divided bit line selector switches | Seiji Shimabukuro, Hiroyuki Ogawa, Naoki Takeguchi | 2017-03-28 |
| 9595568 | Semiconductor memory device having unequal pitch vertical channel transistors employed as selection transistors and method for programming the same | — | 2017-03-14 |