MW

Mark A Warriner

MU Microsemi Semiconductor Ulc: 1 patents #5 of 18Top 30%
Overall (2017): #313,901 of 506,227Top 65%
1
Patents 2017

Issued Patents 2017

Patent #TitleCo-InventorsDate
9595972 Digital phase locked loop arrangement with master clock redundancy Slobodan Milijevic, Johannes Hermanus Aloysius de Rijk, Paul H. L. M. Schram 2017-03-14