Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9812462 | Memory hole size variation in a 3D stacked memory | Liang Pang, Yanli Zhang, Yingda Dong | 2017-11-07 |
| 9779948 | Method of fabricating 3D NAND | Yanli Zhang, Ching-Huang Lu, Zhenyu Lu | 2017-10-03 |
| 9748266 | Three-dimensional memory device with select transistor having charge trapping gate dielectric layer and methods of making and operating thereof | Yanli Zhang, Liang Pang, Ching-Huang Lu, Matthias Baenninger, Yingda Dong | 2017-08-29 |
| 9673216 | Method of forming memory cell film | Liang Pang, Yingda Dong, Ching-Huang Lu | 2017-06-06 |
| 9601428 | Semiconductor fuses with nanowire fuse links and fabrication methods thereof | Chun Yu Wong, Jagar Singh, Min-hwa Chi | 2017-03-21 |