Issued Patents 2017
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9819266 | Digitally controlled zero current switching | Vaibhav Vaidya, Krishnan Ravichandran | 2017-11-14 |
| 9787571 | Link delay based routing apparatus for a network-on-chip | Ram Krishnamurthy, Gregory K. Chen, Mark A. Anders, Himanshu Kaul | 2017-10-10 |
| 9772903 | Resilient register file circuit for dynamic variation tolerance and method of operating the same | Jaydeep P. Kulkarni, Keith Alan Bowman, James W. Tschanz | 2017-09-26 |
| 9722606 | Digital clamp for state retention | Arijit Raychowdhury, Charles Augustine, James W. Tschanz | 2017-08-01 |
| 9678878 | Disabling cache portions during low voltage operations | Christopher B. Wilkerson, Muhammad M. Khellah, Ming Zhang, Jaume Abella, Javier Carretero Casado +3 more | 2017-06-13 |
| 9633716 | Methods and systems to selectively boost an operating voltage of, and controls to an 8T bit-cell array and/or other logic blocks | Jaydeep P. Kulkarni, Bibiche M. Geuskens, James W. Tschanz, Muhammed M. Khellah | 2017-04-25 |
| 9627039 | Apparatus for reducing write minimum supply voltage for memory | Jaydeep P. Kulkarni, Muhammad M. Khellah, James W. Tschanz, Bibiche M. Geuskens | 2017-04-18 |
| 9600283 | Single instruction for specifying a subset of registers to save prior to entering low-power mode, and for specifying a pointer to a function executed after exiting low-power mode | Ethan Schuchman, Hong Wang, Chris Weaver, Belliappa Kuttanna, Asit K. Mallick +1 more | 2017-03-21 |
| 9594625 | Sequential circuit with error detection | Keith Alan Bowman, James W. Tschanz, Nam Sung Kim, Janice C. Lee, Christopher B. Wilkerson +2 more | 2017-03-14 |
| 9577641 | Spin transfer torque based memory elements for programmable device arrays | Arijit Raychowdhury, James W. Tschanz | 2017-02-21 |