Issued Patents 2017
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9734079 | Hybrid exclusive multi-level memory architecture with memory management | Dannie Gerrit Feekes, Shlomo Raikin, Blaise Fanning, Joydeep Ray, Ariel Berkovits +3 more | 2017-08-15 |
| 9563564 | Cache allocation with code and data prioritization | Andrew J. Herdrich, Edwin Verplanke, Ravishankar Iyer, Christopher C. Gianos, Jeffrey D. Chamberlain +2 more | 2017-02-07 |
| 9559726 | Use of error correcting code to carry additional data bits | Daniel Greenspan, Asaf Rubinstein | 2017-01-31 |