Issued Patents 2017
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9734079 | Hybrid exclusive multi-level memory architecture with memory management | Dannie Gerrit Feekes, Shlomo Raikin, Blaise Fanning, Julius Mandelblat, Ariel Berkovits +3 more | 2017-08-15 |
| 9680652 | Dynamic heterogeneous hashing functions in ranges of system memory addressing space | Jorge Parra, Ramadass Nagarajan | 2017-06-13 |
| 9626316 | Managing shared resources between multiple processing devices | Inder M. Sodhi, Varghese George | 2017-04-18 |
| 9600413 | Common platform for one-level memory architecture and two-level memory architecture | Varghese George, Inder M. Sodhi, Jeffrey R. Wilcox | 2017-03-21 |
| 9563251 | Representing a cache line bit pattern via meta signaling | Saher Abu Rahme, Christopher E. Cox | 2017-02-07 |
| 9542336 | Isochronous agent data pinning in a multi-level memory system | Marc Torrant, David Puffer, Blaise Fanning, Bryan R. White, Neil Schaper +3 more | 2017-01-10 |