Issued Patents 2017
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9805438 | Dynamically rebalancing graphics processor resources | Nikos Kaburlasos, Eric C. Samson | 2017-10-31 |
| 9779473 | Memory mapping for a graphics processing unit | Balaji Vembu, Murali Ramadoss, Aditya Navale | 2017-10-03 |
| 9678795 | Direct ring 3 submission of processing jobs to adjunct processors | Aditya Navale, Balaji Vembu, Murali Ramadoss | 2017-06-13 |
| 9665488 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Opher Kahn | 2017-05-30 |
| 9626735 | Page management approach to fully utilize hardware caches for tiled rendering | Aditya Navale | 2017-04-18 |
| 9626732 | Supporting atomic operations as post-synchronization operations in graphics processing architectures | Hema Chand Nalluri, Aditya Navale | 2017-04-18 |
| 9619855 | Scalable geometry processing within a checkerboard multi-GPU configuration | Peter L. Doyle, Jeffery S. Boles, Arthur D. Hunter Jr., Aditya Navale | 2017-04-11 |
| 9612833 | Handling compressed data over distributed cache fabric | Hong Jiang, James M. Holland | 2017-04-04 |
| 9542336 | Isochronous agent data pinning in a multi-level memory system | Marc Torrant, David Puffer, Blaise Fanning, Bryan R. White, Joydeep Ray +3 more | 2017-01-10 |