Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Page management approach to fully utilize hardware caches for tiled rendering

Page management approach to fully utilize hardware caches for tiled rendering

US Patent 9626735 · Granted Apr 18, 2017

Estimated economic value: $8,310,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Multi-render partitioning2025
Graphics processing unit processing and caching improvements2025
Local memory translation table accessed and dirty flags2025
Unified stateless compression system for universally consumable compression2025
Unified stateless compression system for universally consumable compression2025
Coordination and increased utilization of graphics processors during inference2025
Regional adjustment of render rate2025
Neural network optimization mechanism2025
System, apparatus and method for increasing performance in a processor during a 2025
Engine to enable high speed context switching via on-die storage2025
System-on-a-chip (SoC) architecture for low power state communication2025
Dynamic memory reconfiguration2025