Issued Patents 2017
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9626189 | Reducing operand store compare penalties | David S. Hutton, John G. Rell, Jr., Chung-Lung K. Shum | 2017-04-18 |
| 9619383 | Dynamic predictor for coalescing memory transactions | Harold W. Cain, III, Michael K. Gschwind, Maged M. Michael, Eric M. Schwarz | 2017-04-11 |
| 9594661 | Method for executing a query instruction for idle time accumulation among cores in a multithreading computer system | Jonathan D. Bradbury, Mark S. Farrell, Charles W. Gainey, Jr., Dan F. Greiner, Lisa C. Heller +4 more | 2017-03-14 |
| 9594660 | Multithreading computer system and program product for executing a query instruction for idle time accumulation among cores | Jonathan D. Bradbury, Mark S. Farrell, Charles W. Gainey, Jr., Dan F. Greiner, Lisa C. Heller +4 more | 2017-03-14 |
| 9582315 | Software enabled and disabled coalescing of memory transactions | Michael K. Gschwind, Valentina Salapura, Chung-Lung K. Shum | 2017-02-28 |
| 9582324 | Controlling execution of threads in a multi-threaded processor | Khary J. Alexander, Mark S. Farrell, John G. Rell, Jr., Timothy J. Slegel | 2017-02-28 |
| 9575802 | Controlling execution of threads in a multi-threaded processor | Khary J. Alexander, Mark S. Farrell, John G. Rell, Jr., Timothy J. Slegel | 2017-02-21 |
| 9575890 | Supporting atomic accumulation with an addressable accumulator | Michael K. Gschwind, Eric M. Schwarz | 2017-02-21 |
| 9535608 | Memory access request for a memory protocol | Harold W. Cain, III, Michael K. Gschwind, Valentina Salapura, Timothy J. Slegel | 2017-01-03 |