PB

Peter Baars

Globalfoundries: 12 patents #25 of 1,311Top 2%
Overall (2017): #4,688 of 506,227Top 1%
12
Patents 2017

Issued Patents 2017

Patent #TitleCo-InventorsDate
9806170 Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dual raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOI George R. Mulfinger, Ryan Sporer, Rick Carter, Hans-Jürgen Thees, Jan Höntschel 2017-10-31
9793294 Junction formation with reduced Ceff for 22nm FDSOI devices Hans-Juergen Thees 2017-10-17
9735174 FDSOI—capacitor Jan Hoentschel, Hans-Peter Moll 2017-08-15
9673210 Semiconductor structure including a nonvolatile memory cell having a charge trapping layer and method for the formation thereof Hans-Juergen Thees, Joerg Schmid 2017-06-06
9666589 FinFET based flash memory cell Juergen Faul 2017-05-30
9634088 Junction formation with reduced CEFF for 22NM FDSOI devices Hans-Juergen Thees 2017-04-25
9634017 Semiconductor structure including a nonvolatile memory cell and method for the formation thereof Hans-Juergen Thees 2017-04-25
9608110 Methods of forming a semiconductor circuit element and semiconductor circuit element Carsten Grass 2017-03-28
9608003 Integrated circuit product with bulk and SOI semiconductor devices Hans-Peter Moll, Jan Hoentschel 2017-03-28
9564521 Semiconductor device comprising ferroelectric elements and fast high-K metal gate transistors Till Schloesser 2017-02-07
9553030 Method of manufacturing P-channel FET device with SiGe channel Hans-Peter Moll 2017-01-24
9553046 E-fuse in SOI configuration Jan Hoentschel, Hans-Peter Moll 2017-01-24