LB

Lalit Bharat

CS Cadence Design Systems: 1 patents #55 of 238Top 25%
📍 Noida, IN: #12 of 81 inventorsTop 15%
Overall (2017): #338,308 of 506,227Top 70%
1
Patents 2017

Issued Patents 2017

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
9633159 Method and system for performing distributed timing signoff and optimization Vipul Parikh, Shagufta Siddique, Prashant Sethia, Naresh Kumar 2017-04-25